IBM says it has cracked one of the hardest problems in computing: how to keep making the components inside chips smaller. The company has unveiled what it calls the world's first sub-1 nanometer chip technology, a research prototype aimed at the next generation of AI hardware.
For decades, progress has followed Moore's Law — the observation that the number of transistors packed onto a chip roughly doubles every couple of years, making computers faster and cheaper. But shrinking transistors sideways has gotten brutally difficult. According to Reuters, IBM revealed the new technology as part of a broader push into AI computing, where demand for processing power is exploding.
IBM's answer is a design it calls a "nanostack" transistor architecture. As ServeTheHome reports, instead of only shrinking chips on a flat plane, nanostack builds them taller by stacking wafers — essentially going up rather than out. IBM is positioning the approach for the sub-1nm era expected to arrive in the 2030s. The New York Times framed the breakthrough simply: IBM says it has found a way to keep shrinking the technology inside chips.
Live Science quoted the development as "the next jump in technology," noting it keeps Moore's Law alive a little longer. The announcement landed well on Wall Street: according to Barron's, IBM stock surged after its research division unveiled the sub-1-nanometer prototype.
It's worth stressing this is research, not a product on shelves. The sources describe a prototype and an architecture meant to guide chip construction over the coming decade, not chips you can buy today.
Why it matters: nearly every modern advance — from smartphones to the AI systems straining today's data centers — depends on chips continuing to get smaller and more efficient, and IBM's work suggests that march isn't over yet.