Chipmaking giant TSMC is stepping up work on a next-generation packaging technology called CoPoS, according to research firm TrendForce.
Packaging is the often-overlooked stage where finished chips are assembled, connected, and protected so they can work together inside a device. As demand for artificial intelligence hardware grows, how chips are packaged has become just as important as how they are manufactured. Analytics Insight frames TSMC's CoPoS effort as an AI chip development worth watching.
Alongside CoPoS, TrendForce and GuruFocus report that TSMC is shifting attention toward glass core substrates — a base material that chips are mounted on. TrendForce says this opens an opportunity tied to FOPLP, a panel-level packaging approach.
According to TrendForce, that opportunity extends beyond TSMC itself. Taiwan's panel makers, along with local materials and equipment suppliers, are positioned to use FOPLP to pursue the glass core substrate market. In other words, companies that have historically built display panels could find new business supplying the advanced packaging supply chain.
The sources do not detail timelines, costs, or specific performance gains, so it remains a development effort rather than a finished product.
Why it matters: packaging breakthroughs like CoPoS and glass substrates are becoming a key battleground in the race to build faster, more powerful AI chips — and TSMC's push could pull a wider circle of Taiwanese suppliers into that supply chain.