A chip architecture built to speed up encryption that can withstand quantum computers has passed a key validation step, according to a report in Interesting Engineering.
The outlet reports that BTQ Technologies and ITRI, Taiwan's Industrial Technology Research Institute, have validated a compute-in-memory chip architecture designed to accelerate post-quantum cryptography. The validation was carried out in a 28nm test environment.
Two terms are doing the heavy lifting here. Post-quantum cryptography refers to a new generation of encryption methods intended to remain secure even against a sufficiently powerful quantum computer, which in theory could break much of the encryption protecting today's banking, messaging, and internet traffic. Compute-in-memory is a hardware approach that performs calculations inside or beside the memory itself, rather than shuttling data back and forth to a separate processor.
The 28nm reference describes the manufacturing process node used for the test. It is a mature, widely available generation of chipmaking rather than the cutting-edge nodes used for the most advanced smartphone and AI processors, which generally makes it cheaper and easier to produce at volume.
The sources available do not include performance figures, commercial timelines, or customer commitments, so how far this sits from shipping silicon is not stated.
Why it matters: the math behind quantum-resistant encryption is more demanding than what today's systems use, and if that protection is going to reach ordinary devices rather than just high-end servers, someone has to make it run fast and cheaply in hardware — which is exactly the problem this milestone is aimed at.